The present invention relates to electrical circuits and more particularly to power supply regulation of digital electronic systems.
A variety of voltage regulators are commonly used today to provide tight static and dynamic tolerance supply voltages to digital electronic systems. Typically, high performance digital electronic systems for computer, communication and industrial applications include many large digital integrated circuits (e.g., microprocessors, digital signal processors, memory). The processing power, clock frequency, size and power consumption of these digital semiconductor devices are constantly increasing. Additionally, due at least in part to thermal, signal integrity and reliability issues, these types of digital devices require much lower supply voltages with tight static and dynamic tolerances. For example, there are estimations that high-end microprocessors with a clock frequency of about 3.5 GHz could have a core voltage as low as 1.2V with peak-to-peak tolerances of only 72 mV and consume 130A of current. During operation, such processors could have transitions from xe2x80x9csleepxe2x80x9d mode of operation to maximum performance and backwards in just a few nanoseconds. That means that the thermal, electrical and mechanical problems need to be controlled for reliable and cost effective powering of such digital electronic systems.
Typically, large digital integrated circuits are located on multi-layer printed circuit boards (PCBs). Different supply voltages can be required for different portions of the printed circuit boards. For example, the core, the input interfaces, the output interfaces and other portions of the PCB can require different supply voltages. In most cases, the core consumes the most amount of power and has the tightest requirements for dynamic and static tolerance. Furthermore, there are digital systems where many large digital integrated circuits are used. These digital integrated circuits have packages with hundreds and sometimes thousands of pins that occupy relatively large areas of the PCB. Many of these pins are dedicated to the supply voltage and ground, and electrically distributed throughout the package area. These pins are electrically connected to the power and ground planes, which are actually special dedicated layers of a multi-layer PCB. Special high-frequency AC decoupling capacitors are placed around the digital integrated circuit packages, and over the power plane area to reject high-frequency voltage spikes during the transients. A voltage regulator is located on the PCB to control static and dynamic voltage drops.
The power and ground planes and interconnections have parasitic inductance and resistance distributed all over the PCB area. During the high slew-rate transients of digital processing devices (e.g., DSP, microprocessor, controller), the distributed inductance and resistance causes significant voltage drops and as a result possible xe2x80x9cglitchesxe2x80x9d of digital signals and false processing. The voltage regulator is located as close as possible to the processing devices to avoid significant voltage drop at high current and high slew-rate transients experienced by the digital processing devices. The control method of the regulator has to have fast load-current transient response without delays and limitations of duty cycle to decrease peak-to-peak voltage spikes through power and ground planes near the digital processing device pins. One example of a power delivery system for large current devices is a synchronous-buck converter with controller having negative feedback loop. However, these devices require large bulk capacitors and inductors for input and output filters for high currents (e.g., 30A). The large bulk capacitors and inductors occupy a large area and cannot be placed in close proximity to the digital processing devices.
Another solution is referred to as interleaved or multi-phase topology. In this solution, the switching regulator includes an n-channel interleaved synchronous buck converter with a controller. During the steady state operation, the control signals of each channel are delayed relative to each other by Ts/n, where Ts is a switching cycle of each channel and n is the total number of channels. Each channel conducts Io/n current where Io is the summarized output current. The interleaving of the current through output and input capacitors over Ts/n switching cycles, lowers the switching cycle of these currents. This decreases the value and number of output and input capacitors. Therefore, smaller components can be used and distributed through the multi-layer board area and placed closer to the digital processor.
In this solution, the regulator controls the voltage at one point of the power plane where the feedback is taken back to the controller. The static and dynamic regulation has to be tightly controlled to keep the voltage within the limits all over the plane area. Therefore, the power plane copper has to have increased thickness to decrease the resistive voltage drop, which is difficult to implement in a multi-layer PCB. A significant number of high frequency, decoupling capacitors have to be populated over the area of the power and ground plane to decrease the inductive voltage drop. Additionally, a very accurate current sharing mechanism has to be implemented to get low ripple effect through the input and output capacitors. The increased number of channels to meet the higher current requirements and the high switching frequency increase the difficulty in current sharing. Therefore, the control circuitry becomes very complicated. Any changes of load current requirements leads to a change in the number of channels or current through each channel resulting in a need for a complete redesign of the system.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention relates to systems and methods for regulating power supply delivery to electronic devices disposed on a PCB board. The PCB board comprises a plurality of voltage or power regulation cell areas or regions based on current requirements of electronic devices at different portions of the PCB. A voltage regulator cell system is provided for a respective voltage regulation cell region, such that the supply voltage is regulated over the area of a power plane and a ground plane. The voltage regulator cell systems are provided with feedback loops at corresponding voltage regulation cell regions which are compared with a reference voltage to adjust for difference errors. A voltage regulator cell system regulates the voltage through a respective dedicated area of the power plane and the ground plane. Power supply delivery is improved by facilitating accurate current sharing between voltage regulator cell systems throughout the power and ground plane.
In one aspect of the invention, each voltage regulator cell system utilizes internal reference voltages of similar voltage values to regulate power delivery in a respective voltage regulation cell region. Alternatively, a single external reference voltage or a single internal reference can be employed for providing a reference voltage to each voltage regulator cell system. In another aspect of the invention, an output of one voltage regulator cell system is used as a reference voltage for one or more other voltage regulator cell systems. In yet another aspect of the invention, each voltage regulator cell system has its own reference voltage tied with the reference voltages of other voltage regulator cell systems. Thus, a more accurate average reference voltage is provided to the whole power delivery system.
Current sharing between the cells can be improved by predetermining the output impedance of each power regulator cell system. The selected output impedance controls the voltage regulation and peak-to-peak dynamic response within the power regulation cells during load current transients in a wide frequency bandwidth range. The output impedance can be provided by the circuitry that senses the current of each power regulation cell area and subtracts its output voltage, proportional to the current, from the reference voltage. If the voltage regulator cell system sources the current, a voltage proportional to the current is subtracted from the reference voltage. If the voltage regulator cell system sinks the current, the voltage proportional to the current is added to the reference voltage. The current sensing circuitry can be implemented by a voltage drop caused by a load current flowing through a selected droop resistor inserted between the output of voltage regulator cell system, and the point where the output voltage feedback signal is measured. In one aspect of the invention, the voltage regulator cell system is implemented as a synchronous buck converter switching supply. It is to be appreciated that other switching supplies can be employed in accordance with the present invention.
The following description and the annexed drawings set forth certain illustrative aspects of the invention. These aspects are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.